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| NC7WBD3125 TinyLogic UHS 2-Bit Low Power Bus Switch with Level Shifting May 2000 Revised April 2003 NC7WBD3125 TinyLogic UHS 2-Bit Low Power Bus Switch with Level Shifting General Description The NC7WBD3125 is a 2-bit ultra high-speed CMOS FET bus switch with enhanced level shifting circuitry and with TTL-compatible active LOW control inputs. The low On Resistance of the switch allows inputs to be connected to outputs with minimal propagation delay and without generating additional ground bounce noise. The device is organized as a 2-bit switch with independent bus enable (OE) controls. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. Reduced voltage drive to the gate of the FET switch permits nominal level shifting of 5V to 3V through the switch. Control inputs tolerate voltages up to 5.5V independent of VCC. Features s Space saving US8 surface mount package s MicroPak leadless package s Typical 3 switch resistance at 5.0V VCC , VIN = 0V s Level shift facilitates 5V to 3.3V interfacing s Minimal propagation delay through the switch s Power down high impedance input/output s Zero bounce in flow through mode s TTL compatible active LOW control inputs s Control inputs are overvoltage tolerant s Bus switch replacement for x125 logic part Ordering Code: Package Order Number Package Code WB5D T9 Package Description Supplied As Number Top Mark 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel NC7WBD3125K8X MAB08A NC7WBD3125L8X MAC08A (Preliminary) TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPak is a trademark of Fairchild Semiconductor Corporation. (c) 2003 Fairchild Semiconductor Corporation DS500374 www.fairchildsemi.com NC7WBD3125 Logic Diagram Connection Diagrams Pin Descriptions Pin Name A B OE Description Bus A Switch I/O Bus B Switch I/O Bus Enable Input (Top View) Pin One Orientation Diagram Function Table Bus Enable Input (OE) L H H = HIGH Logic Level L = LOW Logic Level AAA represents Product Code Top Mark - see ordering code Note: Orientation of Top Mark determines Pin One location. Read the top Function B Connected to A Disconnected product code mark left to right, Pin One is the lower left pin (see diagram). Pad Assignments for MicroPak (Top Thru View) www.fairchildsemi.com 2 NC7WBD3125 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Switch Voltage (VS) DC Output Voltage (VIN) (Note 2) DC Input Diode Current (IIK) VIN < 0V DC Output (IOUT) Current DC VCC or Ground Current (ICC/IGND ) Storage Temperature Range (TSTG) Junction Temperature under Bias (TJ) Lead Temperature (TL) (Soldering, 10 Seconds) Power Dissipation (PD) @ +85C -0.5V to +7.0V -0.5V to +7.0V -0.5V to +7.0V -50 mA 128 mA Recommended Operating Conditions (Note 3) Supply Operating (VCC) Control Input Voltage (VIN) Switch Input Voltage (VIN) Switch Output Voltage (VOUT) Operating Temperature (TA) Input Rise and Fall Time (tr, tf) Control Input Switch I/O Thermal Resistance (JA) 4.5V to 5.5V 0V to 5.5V 0V to 5.5V 0V to 5.5V -40C to +85C 0 ns/V to 5 ns/V 0 ns/V to DC 250C/W 100 mA -65C to +150C +150C +260C 250 mW Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused logic inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIK VIH VIL VOH IIN IOFF RON Parameter Clamp Diode Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage Input Leakage Current Power OFF Leakage Current Switch On Resistance (Note 4) ICC Quiescent Supply Current VCC (V) 4.5 4.5 to 5.5 4.5 to 5.5 4.5 to 5.5 5.5 5.5 4.5 4.5 4.5 5.5 1.1 ICC 1.5 10 Increase in ICC per Input (Note 5) 5.5 1 2.5 mA A mA 3 3 15 See Figure 3 1.0 1.0 7 7 50 2.0 0.8 Min TA = -40C to +85C Typ Max -1.2 Units V V V V A A VIN = VCC 0 VIN 5.5V 0 A, B VCC VIN = 0V, IIN = 64 mA VIN = 0V, IIN = 30 mA VIN = 2.4V, IIN = 15 mA VIN = VCC or GND, IOUT = 0 OE1 = OE2 = GND OE1 = OE2 = VCC VIN = 3.4V, One OE Input only, Other OE = VCC Conditions IIN = -18 mA Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. Note 5: Per TTL driven input (VIN = 3.4V, control input only). A and B pins do not contribute to ICC. 3 www.fairchildsemi.com NC7WBD3125 AC Electrical Characteristics TA = -40C to +85C, Symbol tPHL, tPLH tPZL, tPZH tPLZ, tPHZ Output Disable Time 4.5 to 5.5 0.8 3.0 4.8 ns Parameter Propagation Delay Bus-to-Bus (Note 6) Output Enable Time 4.5 to 5.5 1.0 3.5 5.8 ns VI = 7V for tPZL VI = 0V for tPZH VI = 7V for tPLZ VI = 0V for tPHZ VCC (V) 4.5 to 5.5 CL = 50 pF, RU = RD = 500 Min Typ Max 0.25 ns VI = OPEN Units Conditions Figure Number Figures 1, 2 Figures 1, 2 Figures 1, 2 Note 6: This parameter is guaranteed. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). The specified limit is calculated on this basis. Capacitance Symbol CIN CI/O (OFF) CI/O (ON) Parameter Control Pin Input Capacitance Port OFF Capacitance Port ON Capacitance Typ 2.5 6 12 Max Units pF pF pF VCC = 0V VCC = 5.0V = OE VCC = 5.0V, OE = 0V Conditions AC Loading and Waveforms Input driven by 50 source terminated in 50 CL includes load and stray capacitance Input PRR = 1.0 MHz; tW = 500 ns FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms www.fairchildsemi.com 4 NC7WBD3125 DC Electrical Characteristics FIGURE 3. Typical High Level Output Voltage vs. Supply Voltage 5 www.fairchildsemi.com NC7WBD3125 Tape and Reel Specification TAPE FORMAT for US8 Package Designator K8X Tape Section Leader (Start End) Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) Number Cavities 125 (typ) 250 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed TAPE FORMAT for MicroPak Package Designator L8X Tape Section Number Cavities 125 (typ) 250 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed Leader (Start End) Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) www.fairchildsemi.com 6 NC7WBD3125 Tape and Reel Specification REEL DIMENSIONS inches (millimeters) (Continued) Tape Size 8 mm A 7.0 (177.8) B 0.059 (1.50) C 0.512 (13.00) D 0.795 (20.20) N 2.165 (55.00) W1 0.331 + 0.059/-0.000 (8.40 + 1.50/-0.00) W2 0.567 (14.40) W3 W1 + 0.078/-0.039 (W1 + 2.00/-1.00) 7 www.fairchildsemi.com NC7WBD3125 Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package Number MAB08A www.fairchildsemi.com 8 NC7WBD3125 TinyLogic UHS 2-Bit Low Power Bus Switch with Level Shifting Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead MicroPak, 1.6 mm Wide Package Number MAC08A (Preliminary) Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 9 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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